As part of the baud rate converter (see later), it was required to interface CMOS at 18 V (CD4046 PLL) to a 5 V part (TTL, 7493).
The requirement was that it should work up to 3 MHz.
1. BJT inverter
This is a simple way, 2 resistors and a transistor (BC547B), but it is also shockingly slow. Both in simulation in LTSpice and in a realised circuit it could not even handle a 50% dutycycle 1 MHz squareware.
2. Resistive divider
This will not work due to the relative low input impedance of the TTL. The output swing is reduced to 1.3 V (1.1 V to 2.4 V).
Here we use let the internal pull-up in the TTL part for the high signal and place a diode in reverse so the output stage of the CMOS get a low-impedance path to pull the signal low. The input voltage will be close to the limit, about 0.7 V due to the diode voltage drop.